Senior Software Engineer Locations: Pittsburgh, PA We're supporting an exciting robotics and automation project developing a vision-based quality... Read more
Locations: Pittsburgh, PA
We're supporting an exciting robotics and automation project developing a vision-based quality control platform for robotic storage systems used at large scale across multiple operational sites.
The platform combines NVIDIA Jetson edge devices, AWS IoT Core, MQTT, Lambda, and S3 to process inspection data and support ML-driven pass/fail decisions. This is a greenfield opportunity to help build and scale the device-to-cloud architecture from the ground up.
ResponsibilitiesDesign and build scalable backend systems in PythonDevelop device-to-cloud pipelines using AWS IoT Core and MQTTBuild integrations with AWS services and internal APIsSupport system integration, testing, and deploymentCollaborate with robotics, vision, and software engineering teamsRequired SkillsStrong Python development experienceAWS expertise, including:IoT CoreLambdaS3MQTTAPI integrationsEvent-driven architecturesIntegration and system testingPreferred SkillsAWS IoT GreengrassNVIDIA JetsonIndustrial IoT or Edge ComputingComputer Vision, ML, or Anomaly DetectionDocker, Terraform, CDK, or CI/CD
If you're interested in building large-scale IoT and robotics solutions in a fast-moving environment, we'd love to hear from you.
GCS is acting as an Employment Business in relation to this vacancy.
Read lessPittsburgh, Pennsylvania, United States of AmericaContractRemote
Senior Software Engineer Locations: Denver, COWe're supporting an exciting robotics and automation project developing a vision-based quality control... Read more
Locations: Denver, CO
We're supporting an exciting robotics and automation project developing a vision-based quality control platform for robotic storage systems used at large scale across multiple operational sites.
The platform combines NVIDIA Jetson edge devices, AWS IoT Core, MQTT, Lambda, and S3 to process inspection data and support ML-driven pass/fail decisions. This is a greenfield opportunity to help build and scale the device-to-cloud architecture from the ground up.
ResponsibilitiesDesign and build scalable backend systems in PythonDevelop device-to-cloud pipelines using AWS IoT Core and MQTTBuild integrations with AWS services and internal APIsSupport system integration, testing, and deploymentCollaborate with robotics, vision, and software engineering teamsRequired SkillsStrong Python development experienceAWS expertise, including:IoT CoreLambdaS3MQTTAPI integrationsEvent-driven architecturesIntegration and system testingPreferred SkillsAWS IoT GreengrassNVIDIA JetsonIndustrial IoT or Edge ComputingComputer Vision, ML, or Anomaly DetectionDocker, Terraform, CDK, or CI/CD
If you're interested in building large-scale IoT and robotics solutions in a fast-moving environment, we'd love to hear from you.
GCS is acting as an Employment Business in relation to this vacancy.
Read lessDenver, Colorado, United States of AmericaContractRemote
Senior Software Engineer Locations: San Jose, CA We're supporting an exciting robotics and automation project developing a vision-based... Read more
Locations: San Jose, CA
We're supporting an exciting robotics and automation project developing a vision-based quality control platform for robotic storage systems used at large scale across multiple operational sites.
The platform combines NVIDIA Jetson edge devices, AWS IoT Core, MQTT, Lambda, and S3 to process inspection data and support ML-driven pass/fail decisions. This is a greenfield opportunity to help build and scale the device-to-cloud architecture from the ground up.
ResponsibilitiesDesign and build scalable backend systems in PythonDevelop device-to-cloud pipelines using AWS IoT Core and MQTTBuild integrations with AWS services and internal APIsSupport system integration, testing, and deploymentCollaborate with robotics, vision, and software engineering teamsRequired SkillsStrong Python development experienceAWS expertise, including:IoT CoreLambdaS3MQTTAPI integrationsEvent-driven architecturesIntegration and system testingPreferred SkillsAWS IoT GreengrassNVIDIA JetsonIndustrial IoT or Edge ComputingComputer Vision, ML, or Anomaly DetectionDocker, Terraform, CDK, or CI/CD
If you're interested in building large-scale IoT and robotics solutions in a fast-moving environment, we'd love to hear from you.
GCS is acting as an Employment Business in relation to this vacancy.
Read lessSan Jose, California, United States of AmericaContractRemote
Senior Software EngineerLocations: Boston, MA We're supporting an exciting robotics and automation project developing a vision-based quality control... Read more
Locations: Boston, MA
We're supporting an exciting robotics and automation project developing a vision-based quality control platform for robotic storage systems used at large scale across multiple operational sites.
The platform combines NVIDIA Jetson edge devices, AWS IoT Core, MQTT, Lambda, and S3 to process inspection data and support ML-driven pass/fail decisions. This is a greenfield opportunity to help build and scale the device-to-cloud architecture from the ground up.
ResponsibilitiesDesign and build scalable backend systems in PythonDevelop device-to-cloud pipelines using AWS IoT Core and MQTTBuild integrations with AWS services and internal APIsSupport system integration, testing, and deploymentCollaborate with robotics, vision, and software engineering teamsRequired SkillsStrong Python development experienceAWS expertise, including:IoT CoreLambdaS3MQTTAPI integrationsEvent-driven architecturesIntegration and system testingPreferred SkillsAWS IoT GreengrassNVIDIA JetsonIndustrial IoT or Edge ComputingComputer Vision, ML, or Anomaly DetectionDocker, Terraform, CDK, or CI/CD
If you're interested in building large-scale IoT and robotics solutions in a fast-moving environment, we'd love to hear from you.
GCS is acting as an Employment Business in relation to this vacancy.
Read lessBoston, Massachusetts, United States of AmericaContractRemote
Senior Software Engineer (Python & AWS IoT)Locations: Dallas, TX We're supporting an exciting robotics and automation project developing... Read more
Locations: Dallas, TX
We're supporting an exciting robotics and automation project developing a vision-based quality control platform for robotic storage systems used at large scale across multiple operational sites.
The platform combines NVIDIA Jetson edge devices, AWS IoT Core, MQTT, Lambda, and S3 to process inspection data and support ML-driven pass/fail decisions. This is a greenfield opportunity to help build and scale the device-to-cloud architecture from the ground up.
ResponsibilitiesDesign and build scalable backend systems in PythonDevelop device-to-cloud pipelines using AWS IoT Core and MQTTBuild integrations with AWS services and internal APIsSupport system integration, testing, and deploymentCollaborate with robotics, vision, and software engineering teamsRequired SkillsStrong Python development experienceAWS expertise, including:IoT CoreLambdaS3MQTTAPI integrationsEvent-driven architecturesIntegration and system testingPreferred SkillsAWS IoT GreengrassNVIDIA JetsonIndustrial IoT or Edge ComputingComputer Vision, ML, or Anomaly DetectionDocker, Terraform, CDK, or CI/CD
If you're interested in building large-scale IoT and robotics solutions in a fast-moving environment, we'd love to hear from you.
GCS is acting as an Employment Business in relation to this vacancy.
Read lessDallas, Texas, United States of AmericaContractRemote
Job Title: FPGA Engineer About the Role:We are seeking an experienced FPGA Engineer to design and develop advanced... Read more
Job Title: FPGA Engineer
About the Role:
We are seeking an experienced FPGA Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.
Key Responsibilities:
Own the development and delivery of one or more FPGA bitstreams.
Design, develop, and implement complex FPGA architectures using Verilog HDL.
Lead FPGA development across the complete lifecycle, including:
Microarchitecture
RTL Design
Physical Implementation
Timing Closure
Simulation & Verification
Lab Validation
Production Release
Develop FPGA-based networking and digital communication functions.
Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.
Build FPGA prototypes to evaluate architecture and design tradeoffs.
Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.
Perform synthesis, place & route, timing analysis, and design optimization.
Develop comprehensive testbenches and simulation environments.
Debug FPGA designs in both simulation and hardware environments.
Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.
Create technical documentation including design specifications, verification plans, and test documentation.
Support manufacturing, production deployment, and post-release engineering activities.
Required Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
7+ years of hands-on FPGA design experience.
Strong expertise with Verilog HDL for RTL design and verification.
Experience designing with AMD Xilinx Versal ACAP FPGA architecture.
Experience working with Microchip IGLOO2 FPGA platforms.
Proficiency with FPGA development tools such as:
Xilinx Vivado
Microchip Libero SoC
Strong understanding of:
Digital logic design
Timing analysis and timing closure
Clock Domain Crossing (CDC)
Experience with simulation tools such as:
ModelSim
Vivado Simulator
VCS (or equivalent)
Experience using scripting languages such as Python, TCL, or Perl for design automation.
Strong debugging, analytical, and problem-solving skills.
Understanding of industry-standard communication protocols.
Preferred Qualifications:
Experience with SystemVerilog and UVM verification methodologies.
Experience with high-speed interfaces including:
PCIe
DDR
Ethernet
SerDes
Familiarity with embedded systems and hardware/software integration.
Experience using version control systems such as Git or SVN.
Background in digital communications, networking, or signal processing.
Experience working with DO-254 or other safety-critical design standards.
Required Technical Skills:
HDL Languages: Verilog (required), SystemVerilog (preferred)
FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2
Design Tools: Vivado, Libero SoC
Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)
Scripting: Python, TCL, Perl
Version Control: Git, SVN
Protocols: Industry-standard communication protocols
Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up
GCS is acting as an Employment Business in relation to this vacancy.
Read lessSanta Cruz, California, United States of AmericaContract
Job Title: Senior FPGA Engineer About the Role:We are seeking an experienced Senior FPGA Engineer to design and... Read more
Job Title: Senior FPGA Engineer
About the Role:
We are seeking an experienced Senior FPGA Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.
Key Responsibilities:
Own the development and delivery of one or more FPGA bitstreams.
Design, develop, and implement complex FPGA architectures using Verilog HDL.
Lead FPGA development across the complete lifecycle, including:
Microarchitecture
RTL Design
Physical Implementation
Timing Closure
Simulation & Verification
Lab Validation
Production Release
Develop FPGA-based networking and digital communication functions.
Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.
Build FPGA prototypes to evaluate architecture and design tradeoffs.
Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.
Perform synthesis, place & route, timing analysis, and design optimization.
Develop comprehensive testbenches and simulation environments.
Debug FPGA designs in both simulation and hardware environments.
Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.
Create technical documentation including design specifications, verification plans, and test documentation.
Support manufacturing, production deployment, and post-release engineering activities.
Required Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
7+ years of hands-on FPGA design experience.
Strong expertise with Verilog HDL for RTL design and verification.
Experience designing with AMD Xilinx Versal ACAP FPGA architecture.
Experience working with Microchip IGLOO2 FPGA platforms.
Proficiency with FPGA development tools such as:
Xilinx Vivado
Microchip Libero SoC
Strong understanding of:
Digital logic design
Timing analysis and timing closure
Clock Domain Crossing (CDC)
Experience with simulation tools such as:
ModelSim
Vivado Simulator
VCS (or equivalent)
Experience using scripting languages such as Python, TCL, or Perl for design automation.
Strong debugging, analytical, and problem-solving skills.
Understanding of industry-standard communication protocols.
Preferred Qualifications:
Experience with SystemVerilog and UVM verification methodologies.
Experience with high-speed interfaces including:
PCIe
DDR
Ethernet
SerDes
Familiarity with embedded systems and hardware/software integration.
Experience using version control systems such as Git or SVN.
Background in digital communications, networking, or signal processing.
Experience working with DO-254 or other safety-critical design standards.
Required Technical Skills:
HDL Languages: Verilog (required), SystemVerilog (preferred)
FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2
Design Tools: Vivado, Libero SoC
Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)
Scripting: Python, TCL, Perl
Version Control: Git, SVN
Protocols: Industry-standard communication protocols
Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up
GCS is acting as an Employment Business in relation to this vacancy.
Read lessSan Jose, California, United States of AmericaContract
Job Title: Senior FPGA Design Engineer About the Role:We are seeking an experienced Senior FPGA Design Engineer to... Read more
Job Title: Senior FPGA Design Engineer
About the Role:
We are seeking an experienced Senior FPGA Design Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.
Key Responsibilities:
Own the development and delivery of one or more FPGA bitstreams.
Design, develop, and implement complex FPGA architectures using Verilog HDL.
Lead FPGA development across the complete lifecycle, including:
Microarchitecture
RTL Design
Physical Implementation
Timing Closure
Simulation & Verification
Lab Validation
Production Release
Develop FPGA-based networking and digital communication functions.
Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.
Build FPGA prototypes to evaluate architecture and design tradeoffs.
Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.
Perform synthesis, place & route, timing analysis, and design optimization.
Develop comprehensive testbenches and simulation environments.
Debug FPGA designs in both simulation and hardware environments.
Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.
Create technical documentation including design specifications, verification plans, and test documentation.
Support manufacturing, production deployment, and post-release engineering activities.
Required Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
7+ years of hands-on FPGA design experience.
Strong expertise with Verilog HDL for RTL design and verification.
Experience designing with AMD Xilinx Versal ACAP FPGA architecture.
Experience working with Microchip IGLOO2 FPGA platforms.
Proficiency with FPGA development tools such as:
Xilinx Vivado
Microchip Libero SoC
Strong understanding of:
Digital logic design
Timing analysis and timing closure
Clock Domain Crossing (CDC)
Experience with simulation tools such as:
ModelSim
Vivado Simulator
VCS (or equivalent)
Experience using scripting languages such as Python, TCL, or Perl for design automation.
Strong debugging, analytical, and problem-solving skills.
Understanding of industry-standard communication protocols.
Preferred Qualifications:
Experience with SystemVerilog and UVM verification methodologies.
Experience with high-speed interfaces including:
PCIe
DDR
Ethernet
SerDes
Familiarity with embedded systems and hardware/software integration.
Experience using version control systems such as Git or SVN.
Background in digital communications, networking, or signal processing.
Experience working with DO-254 or other safety-critical design standards.
Required Technical Skills:
HDL Languages: Verilog (required), SystemVerilog (preferred)
FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2
Design Tools: Vivado, Libero SoC
Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)
Scripting: Python, TCL, Perl
Version Control: Git, SVN
Protocols: Industry-standard communication protocols
Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up
GCS is acting as an Employment Business in relation to this vacancy.
Read lessSan Francisco, California, United States of AmericaContract
Job Title: Senior FPGA Engineer About the Role:We are seeking an experienced Senior FPGA Engineer to design and... Read more
Job Title: Senior FPGA Engineer
About the Role:
We are seeking an experienced Senior FPGA Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.
Key Responsibilities:
Own the development and delivery of one or more FPGA bitstreams.
Design, develop, and implement complex FPGA architectures using Verilog HDL.
Lead FPGA development across the complete lifecycle, including:
Microarchitecture
RTL Design
Physical Implementation
Timing Closure
Simulation & Verification
Lab Validation
Production Release
Develop FPGA-based networking and digital communication functions.
Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.
Build FPGA prototypes to evaluate architecture and design tradeoffs.
Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.
Perform synthesis, place & route, timing analysis, and design optimization.
Develop comprehensive testbenches and simulation environments.
Debug FPGA designs in both simulation and hardware environments.
Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.
Create technical documentation including design specifications, verification plans, and test documentation.
Support manufacturing, production deployment, and post-release engineering activities.
Required Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
7+ years of hands-on FPGA design experience.
Strong expertise with Verilog HDL for RTL design and verification.
Experience designing with AMD Xilinx Versal ACAP FPGA architecture.
Experience working with Microchip IGLOO2 FPGA platforms.
Proficiency with FPGA development tools such as:
Xilinx Vivado
Microchip Libero SoC
Strong understanding of:
Digital logic design
Timing analysis and timing closure
Clock Domain Crossing (CDC)
Experience with simulation tools such as:
ModelSim
Vivado Simulator
VCS (or equivalent)
Experience using scripting languages such as Python, TCL, or Perl for design automation.
Strong debugging, analytical, and problem-solving skills.
Understanding of industry-standard communication protocols.
Preferred Qualifications:
Experience with SystemVerilog and UVM verification methodologies.
Experience with high-speed interfaces including:
PCIe
DDR
Ethernet
SerDes
Familiarity with embedded systems and hardware/software integration.
Experience using version control systems such as Git or SVN.
Background in digital communications, networking, or signal processing.
Experience working with DO-254 or other safety-critical design standards.
Required Technical Skills:
HDL Languages: Verilog (required), SystemVerilog (preferred)
FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2
Design Tools: Vivado, Libero SoC
Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)
Scripting: Python, TCL, Perl
Version Control: Git, SVN
Protocols: Industry-standard communication protocols
Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up
GCS is acting as an Employment Business in relation to this vacancy.
Read lessBeaverton, Oregon, United States of AmericaContract
Job Title: FPGA Design Engineer About the Role:We are seeking an experienced FPGA Design Engineer to design and... Read more
Job Title: FPGA Design Engineer
About the Role:
We are seeking an experienced FPGA Design Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.
Key Responsibilities:
Own the development and delivery of one or more FPGA bitstreams.
Design, develop, and implement complex FPGA architectures using Verilog HDL.
Lead FPGA development across the complete lifecycle, including:
Microarchitecture
RTL Design
Physical Implementation
Timing Closure
Simulation & Verification
Lab Validation
Production Release
Develop FPGA-based networking and digital communication functions.
Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.
Build FPGA prototypes to evaluate architecture and design tradeoffs.
Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.
Perform synthesis, place & route, timing analysis, and design optimization.
Develop comprehensive testbenches and simulation environments.
Debug FPGA designs in both simulation and hardware environments.
Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.
Create technical documentation including design specifications, verification plans, and test documentation.
Support manufacturing, production deployment, and post-release engineering activities.
Required Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
7+ years of hands-on FPGA design experience.
Strong expertise with Verilog HDL for RTL design and verification.
Experience designing with AMD Xilinx Versal ACAP FPGA architecture.
Experience working with Microchip IGLOO2 FPGA platforms.
Proficiency with FPGA development tools such as:
Xilinx Vivado
Microchip Libero SoC
Strong understanding of:
Digital logic design
Timing analysis and timing closure
Clock Domain Crossing (CDC)
Experience with simulation tools such as:
ModelSim
Vivado Simulator
VCS (or equivalent)
Experience using scripting languages such as Python, TCL, or Perl for design automation.
Strong debugging, analytical, and problem-solving skills.
Understanding of industry-standard communication protocols.
Preferred Qualifications:
Experience with SystemVerilog and UVM verification methodologies.
Experience with high-speed interfaces including:
PCIe
DDR
Ethernet
SerDes
Familiarity with embedded systems and hardware/software integration.
Experience using version control systems such as Git or SVN.
Background in digital communications, networking, or signal processing.
Experience working with DO-254 or other safety-critical design standards.
Required Technical Skills:
HDL Languages: Verilog (required), SystemVerilog (preferred)
FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2
Design Tools: Vivado, Libero SoC
Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)
Scripting: Python, TCL, Perl
Version Control: Git, SVN
Protocols: Industry-standard communication protocols
Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up
GCS is acting as an Employment Business in relation to this vacancy.
Read lessVancouver, Washington, United States of AmericaContract
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