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We are seeking a talented Library Characterisation Engineer to join a high-performing semiconductor engineering team focused on delivering advanced silicon solutions. This role will involve physical implementation, timing closure, design optimization, methodology development, and automation across cutting-edge ASIC and SoC designs.

Key ResponsibilitiesExecute physical design implementation activities including synthesis, floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and timing closure.Perform static timing analysis (STA) and support sign-off activities to ensure design quality and performance targets are achieved.Drive optimization of power, performance, and area (PPA) across complex digital designs.Collaborate with design, verification, and methodology teams to resolve implementation and timing challenges.Support library characterization, timing model validation, and correlation across industry-standard EDA tools.Develop and enhance physical design methodologies, flows, and best practices for advanced technology nodes.Create automation solutions and scripts to improve design efficiency, quality, and productivity.Contribute to technical reviews, design planning, and project execution throughout the development lifecycle.Required Skills & ExperienceBachelor's or Master's degree in Electrical Engineering, Computer Engineering, Electronics, or a related discipline.Experience in ASIC Physical Design, Digital Implementation, Timing Analysis, or Library Characterization.Strong understanding of synthesis, floorplanning, placement, CTS, routing, timing closure, and sign-off methodologies.Hands-on experience with industry-standard EDA tools such as ICC2, Fusion Compiler, Innovus, PrimeTime, StarRC, or similar.Knowledge of timing, power, signal integrity, and physical verification concepts.Experience with scripting and automation using Python, TCL, Perl, or Bash.Strong analytical and problem-solving skills with the ability to debug complex design challenges.Excellent communication skills and the ability to collaborate effectively within cross-functional engineering teams.DesirableKnowledge of advanced timing methodologies including LVF, AOCV, POCV, and SOCV.Experience with library characterization tools and SPICE-based simulations.Understanding of analog IP, GPIO characterization, and semiconductor device modelling.Exposure to advanced process technologies and low-power design techniques.Experience developing automation frameworks and design productivity tools.Familiarity with industry-standard semiconductor development and sign-off flows.Ideal Candidate

A highly motivated Library Characterisation Engineer with a passion for semiconductor technology and digital design implementation. You will be comfortable working on complex ASIC or SoC projects, collaborating with multidisciplinary teams, and leveraging automation to improve design quality and efficiency. The ideal candidate combines strong technical expertise with a proactive approach to problem-solving and continuous improvement.