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Senior FPGA Design Engineer About the Opportunity

Our client is building one of the world's largest low-Earth-orbit (LEO) satellite constellations, delivering broadband internet from space. With hundreds of satellites already in orbit and thousands more planned, they are developing the next generation of space-based communications technology.

The hardware team designs the advanced electronics powering phased-array antennas, including complex multi-layer boards, custom silicon, and high-speed serial interfaces. Engineers on this team have the unique opportunity to see their designs deployed on satellites operating in orbit.

What You'll DoDesign, integrate, and debug RTL on AMD/Xilinx Versal and UltraScale+ FPGAs.Configure and bring up GTY-class transceivers and debug 25 Gbps+ serial links.Implement and validate high-speed Ethernet solutions using MRMAC/CMAC IP (25G/50G/100G).Develop and maintain embedded Linux environments using PetaLinux/Yocto.Perform FPGA and board bring-up using JTAG, ILA, and lab test equipment.Work closely with hardware engineers to support system validation and debugging.Create diagnostic and monitoring tools to support development and test activities.Required Qualifications8+ years of FPGA/RTL development experience using Verilog, SystemVerilog, or VHDL.Hands-on experience with high-speed serial transceivers (GTY/GTM) and/or 25G/50G/100G Ethernet.Proven board bring-up and hardware debugging experience.Experience achieving timing closure on modern FPGA devices.U.S. Citizenship or Permanent Residency required.Preferred QualificationsExperience with AMD/Xilinx Versal ACAP and UltraScale+ platforms.MRMAC or CMAC configuration and optimization experience.Strong background in PetaLinux, Yocto, device trees, and embedded Linux drivers.Nice to HaveExperience with JESD204, Aurora, or similar high-speed protocols.Aerospace, satellite communications, radar, or networking experience.Familiarity with high-reliability or radiation-aware designs.FPGA prototyping experience supporting ASIC development.

Why Join?
Work on cutting-edge satellite technology, collaborate with top-tier engineering teams, and see your FPGA designs deployed on real hardware headed for orbit.

GCS is acting as an Employment Business in relation to this vacancy.

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Senior FPGA Engineer About the Opportunity

Our client is building one of the world's largest low-Earth-orbit (LEO) satellite constellations, delivering broadband internet from space. With hundreds of satellites already in orbit and thousands more planned, they are developing the next generation of space-based communications technology.

The hardware team designs the advanced electronics powering phased-array antennas, including complex multi-layer boards, custom silicon, and high-speed serial interfaces. Engineers on this team have the unique opportunity to see their designs deployed on satellites operating in orbit.

What You'll DoDesign, integrate, and debug RTL on AMD/Xilinx Versal and UltraScale+ FPGAs.Configure and bring up GTY-class transceivers and debug 25 Gbps+ serial links.Implement and validate high-speed Ethernet solutions using MRMAC/CMAC IP (25G/50G/100G).Develop and maintain embedded Linux environments using PetaLinux/Yocto.Perform FPGA and board bring-up using JTAG, ILA, and lab test equipment.Work closely with hardware engineers to support system validation and debugging.Create diagnostic and monitoring tools to support development and test activities.Required Qualifications8+ years of FPGA/RTL development experience using Verilog, SystemVerilog, or VHDL.Hands-on experience with high-speed serial transceivers (GTY/GTM) and/or 25G/50G/100G Ethernet.Proven board bring-up and hardware debugging experience.Experience achieving timing closure on modern FPGA devices.U.S. Citizenship or Permanent Residency required.Preferred QualificationsExperience with AMD/Xilinx Versal ACAP and UltraScale+ platforms.MRMAC or CMAC configuration and optimization experience.Strong background in PetaLinux, Yocto, device trees, and embedded Linux drivers.Nice to HaveExperience with JESD204, Aurora, or similar high-speed protocols.Aerospace, satellite communications, radar, or networking experience.Familiarity with high-reliability or radiation-aware designs.FPGA prototyping experience supporting ASIC development.

Why Join?
Work on cutting-edge satellite technology, collaborate with top-tier engineering teams, and see your FPGA designs deployed on real hardware headed for orbit.

GCS is acting as an Employment Business in relation to this vacancy.

Read less

FPGA Engineer About the Opportunity

Our client is building one of the world's largest low-Earth-orbit (LEO) satellite constellations, delivering broadband internet from space. With hundreds of satellites already in orbit and thousands more planned, they are developing the next generation of space-based communications technology.

The hardware team designs the advanced electronics powering phased-array antennas, including complex multi-layer boards, custom silicon, and high-speed serial interfaces. Engineers on this team have the unique opportunity to see their designs deployed on satellites operating in orbit.

What You'll DoDesign, integrate, and debug RTL on AMD/Xilinx Versal and UltraScale+ FPGAs.Configure and bring up GTY-class transceivers and debug 25 Gbps+ serial links.Implement and validate high-speed Ethernet solutions using MRMAC/CMAC IP (25G/50G/100G).Develop and maintain embedded Linux environments using PetaLinux/Yocto.Perform FPGA and board bring-up using JTAG, ILA, and lab test equipment.Work closely with hardware engineers to support system validation and debugging.Create diagnostic and monitoring tools to support development and test activities.Required Qualifications8+ years of FPGA/RTL development experience using Verilog, SystemVerilog, or VHDL.Hands-on experience with high-speed serial transceivers (GTY/GTM) and/or 25G/50G/100G Ethernet.Proven board bring-up and hardware debugging experience.Experience achieving timing closure on modern FPGA devices.U.S. Citizenship or Permanent Residency required.Preferred QualificationsExperience with AMD/Xilinx Versal ACAP and UltraScale+ platforms.MRMAC or CMAC configuration and optimization experience.Strong background in PetaLinux, Yocto, device trees, and embedded Linux drivers.Nice to HaveExperience with JESD204, Aurora, or similar high-speed protocols.Aerospace, satellite communications, radar, or networking experience.Familiarity with high-reliability or radiation-aware designs.FPGA prototyping experience supporting ASIC development.

Why Join?
Work on cutting-edge satellite technology, collaborate with top-tier engineering teams, and see your FPGA designs deployed on real hardware headed for orbit.

GCS is acting as an Employment Business in relation to this vacancy.

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Job Title: FPGA Engineer

About the Role:

We are seeking an experienced FPGA Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.

Key Responsibilities:

Own the development and delivery of one or more FPGA bitstreams.

Design, develop, and implement complex FPGA architectures using Verilog HDL.

Lead FPGA development across the complete lifecycle, including:

Microarchitecture

RTL Design

Physical Implementation

Timing Closure

Simulation & Verification

Lab Validation

Production Release

Develop FPGA-based networking and digital communication functions.

Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.

Build FPGA prototypes to evaluate architecture and design tradeoffs.

Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.

Perform synthesis, place & route, timing analysis, and design optimization.

Develop comprehensive testbenches and simulation environments.

Debug FPGA designs in both simulation and hardware environments.

Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.

Create technical documentation including design specifications, verification plans, and test documentation.

Support manufacturing, production deployment, and post-release engineering activities.

Required Qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.

7+ years of hands-on FPGA design experience.

Strong expertise with Verilog HDL for RTL design and verification.

Experience designing with AMD Xilinx Versal ACAP FPGA architecture.

Experience working with Microchip IGLOO2 FPGA platforms.

Proficiency with FPGA development tools such as:

Xilinx Vivado

Microchip Libero SoC

Strong understanding of:

Digital logic design

Timing analysis and timing closure

Clock Domain Crossing (CDC)

Experience with simulation tools such as:

ModelSim

Vivado Simulator

VCS (or equivalent)

Experience using scripting languages such as Python, TCL, or Perl for design automation.

Strong debugging, analytical, and problem-solving skills.

Understanding of industry-standard communication protocols.

Preferred Qualifications:

Experience with SystemVerilog and UVM verification methodologies.

Experience with high-speed interfaces including:

PCIe

DDR

Ethernet

SerDes

Familiarity with embedded systems and hardware/software integration.

Experience using version control systems such as Git or SVN.

Background in digital communications, networking, or signal processing.

Experience working with DO-254 or other safety-critical design standards.

Required Technical Skills:

HDL Languages: Verilog (required), SystemVerilog (preferred)

FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2

Design Tools: Vivado, Libero SoC

Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)

Scripting: Python, TCL, Perl

Version Control: Git, SVN

Protocols: Industry-standard communication protocols

Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up

GCS is acting as an Employment Business in relation to this vacancy.

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Job Title: FPGA Engineer

About the Role:

We are seeking an experienced FPGA Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.

Key Responsibilities:

Own the development and delivery of one or more FPGA bitstreams.

Design, develop, and implement complex FPGA architectures using Verilog HDL.

Lead FPGA development across the complete lifecycle, including:

Microarchitecture

RTL Design

Physical Implementation

Timing Closure

Simulation & Verification

Lab Validation

Production Release

Develop FPGA-based networking and digital communication functions.

Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.

Build FPGA prototypes to evaluate architecture and design tradeoffs.

Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.

Perform synthesis, place & route, timing analysis, and design optimization.

Develop comprehensive testbenches and simulation environments.

Debug FPGA designs in both simulation and hardware environments.

Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.

Create technical documentation including design specifications, verification plans, and test documentation.

Support manufacturing, production deployment, and post-release engineering activities.

Required Qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.

7+ years of hands-on FPGA design experience.

Strong expertise with Verilog HDL for RTL design and verification.

Experience designing with AMD Xilinx Versal ACAP FPGA architecture.

Experience working with Microchip IGLOO2 FPGA platforms.

Proficiency with FPGA development tools such as:

Xilinx Vivado

Microchip Libero SoC

Strong understanding of:

Digital logic design

Timing analysis and timing closure

Clock Domain Crossing (CDC)

Experience with simulation tools such as:

ModelSim

Vivado Simulator

VCS (or equivalent)

Experience using scripting languages such as Python, TCL, or Perl for design automation.

Strong debugging, analytical, and problem-solving skills.

Understanding of industry-standard communication protocols.

Preferred Qualifications:

Experience with SystemVerilog and UVM verification methodologies.

Experience with high-speed interfaces including:

PCIe

DDR

Ethernet

SerDes

Familiarity with embedded systems and hardware/software integration.

Experience using version control systems such as Git or SVN.

Background in digital communications, networking, or signal processing.

Experience working with DO-254 or other safety-critical design standards.

Required Technical Skills:

HDL Languages: Verilog (required), SystemVerilog (preferred)

FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2

Design Tools: Vivado, Libero SoC

Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)

Scripting: Python, TCL, Perl

Version Control: Git, SVN

Protocols: Industry-standard communication protocols

Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up

GCS is acting as an Employment Business in relation to this vacancy.

Read less

Job Title: FPGA Engineer

About the Role:

We are seeking an experienced FPGA Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.

Key Responsibilities:

Own the development and delivery of one or more FPGA bitstreams.

Design, develop, and implement complex FPGA architectures using Verilog HDL.

Lead FPGA development across the complete lifecycle, including:

Microarchitecture

RTL Design

Physical Implementation

Timing Closure

Simulation & Verification

Lab Validation

Production Release

Develop FPGA-based networking and digital communication functions.

Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.

Build FPGA prototypes to evaluate architecture and design tradeoffs.

Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.

Perform synthesis, place & route, timing analysis, and design optimization.

Develop comprehensive testbenches and simulation environments.

Debug FPGA designs in both simulation and hardware environments.

Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.

Create technical documentation including design specifications, verification plans, and test documentation.

Support manufacturing, production deployment, and post-release engineering activities.

Required Qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.

7+ years of hands-on FPGA design experience.

Strong expertise with Verilog HDL for RTL design and verification.

Experience designing with AMD Xilinx Versal ACAP FPGA architecture.

Experience working with Microchip IGLOO2 FPGA platforms.

Proficiency with FPGA development tools such as:

Xilinx Vivado

Microchip Libero SoC

Strong understanding of:

Digital logic design

Timing analysis and timing closure

Clock Domain Crossing (CDC)

Experience with simulation tools such as:

ModelSim

Vivado Simulator

VCS (or equivalent)

Experience using scripting languages such as Python, TCL, or Perl for design automation.

Strong debugging, analytical, and problem-solving skills.

Understanding of industry-standard communication protocols.

Preferred Qualifications:

Experience with SystemVerilog and UVM verification methodologies.

Experience with high-speed interfaces including:

PCIe

DDR

Ethernet

SerDes

Familiarity with embedded systems and hardware/software integration.

Experience using version control systems such as Git or SVN.

Background in digital communications, networking, or signal processing.

Experience working with DO-254 or other safety-critical design standards.

Required Technical Skills:

HDL Languages: Verilog (required), SystemVerilog (preferred)

FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2

Design Tools: Vivado, Libero SoC

Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)

Scripting: Python, TCL, Perl

Version Control: Git, SVN

Protocols: Industry-standard communication protocols

Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up

GCS is acting as an Employment Business in relation to this vacancy.

Read less

Job Title: FPGA Engineer

About the Role:

We are seeking an experienced FPGA Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.

Key Responsibilities:

Own the development and delivery of one or more FPGA bitstreams.

Design, develop, and implement complex FPGA architectures using Verilog HDL.

Lead FPGA development across the complete lifecycle, including:

Microarchitecture

RTL Design

Physical Implementation

Timing Closure

Simulation & Verification

Lab Validation

Production Release

Develop FPGA-based networking and digital communication functions.

Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.

Build FPGA prototypes to evaluate architecture and design tradeoffs.

Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.

Perform synthesis, place & route, timing analysis, and design optimization.

Develop comprehensive testbenches and simulation environments.

Debug FPGA designs in both simulation and hardware environments.

Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.

Create technical documentation including design specifications, verification plans, and test documentation.

Support manufacturing, production deployment, and post-release engineering activities.

Required Qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.

7+ years of hands-on FPGA design experience.

Strong expertise with Verilog HDL for RTL design and verification.

Experience designing with AMD Xilinx Versal ACAP FPGA architecture.

Experience working with Microchip IGLOO2 FPGA platforms.

Proficiency with FPGA development tools such as:

Xilinx Vivado

Microchip Libero SoC

Strong understanding of:

Digital logic design

Timing analysis and timing closure

Clock Domain Crossing (CDC)

Experience with simulation tools such as:

ModelSim

Vivado Simulator

VCS (or equivalent)

Experience using scripting languages such as Python, TCL, or Perl for design automation.

Strong debugging, analytical, and problem-solving skills.

Understanding of industry-standard communication protocols.

Preferred Qualifications:

Experience with SystemVerilog and UVM verification methodologies.

Experience with high-speed interfaces including:

PCIe

DDR

Ethernet

SerDes

Familiarity with embedded systems and hardware/software integration.

Experience using version control systems such as Git or SVN.

Background in digital communications, networking, or signal processing.

Experience working with DO-254 or other safety-critical design standards.

Required Technical Skills:

HDL Languages: Verilog (required), SystemVerilog (preferred)

FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2

Design Tools: Vivado, Libero SoC

Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)

Scripting: Python, TCL, Perl

Version Control: Git, SVN

Protocols: Industry-standard communication protocols

Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up

GCS is acting as an Employment Business in relation to this vacancy.

Read less

Job Title: FPGA Engineer

About the Role:

We are seeking an experienced FPGA Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.

Key Responsibilities:

Own the development and delivery of one or more FPGA bitstreams.

Design, develop, and implement complex FPGA architectures using Verilog HDL.

Lead FPGA development across the complete lifecycle, including:

Microarchitecture

RTL Design

Physical Implementation

Timing Closure

Simulation & Verification

Lab Validation

Production Release

Develop FPGA-based networking and digital communication functions.

Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.

Build FPGA prototypes to evaluate architecture and design tradeoffs.

Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.

Perform synthesis, place & route, timing analysis, and design optimization.

Develop comprehensive testbenches and simulation environments.

Debug FPGA designs in both simulation and hardware environments.

Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.

Create technical documentation including design specifications, verification plans, and test documentation.

Support manufacturing, production deployment, and post-release engineering activities.

Required Qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.

7+ years of hands-on FPGA design experience.

Strong expertise with Verilog HDL for RTL design and verification.

Experience designing with AMD Xilinx Versal ACAP FPGA architecture.

Experience working with Microchip IGLOO2 FPGA platforms.

Proficiency with FPGA development tools such as:

Xilinx Vivado

Microchip Libero SoC

Strong understanding of:

Digital logic design

Timing analysis and timing closure

Clock Domain Crossing (CDC)

Experience with simulation tools such as:

ModelSim

Vivado Simulator

VCS (or equivalent)

Experience using scripting languages such as Python, TCL, or Perl for design automation.

Strong debugging, analytical, and problem-solving skills.

Understanding of industry-standard communication protocols.

Preferred Qualifications:

Experience with SystemVerilog and UVM verification methodologies.

Experience with high-speed interfaces including:

PCIe

DDR

Ethernet

SerDes

Familiarity with embedded systems and hardware/software integration.

Experience using version control systems such as Git or SVN.

Background in digital communications, networking, or signal processing.

Experience working with DO-254 or other safety-critical design standards.

Required Technical Skills:

HDL Languages: Verilog (required), SystemVerilog (preferred)

FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2

Design Tools: Vivado, Libero SoC

Simulation: ModelSim, Vivado Simulator, VCS (or equivalent)

Scripting: Python, TCL, Perl

Version Control: Git, SVN

Protocols: Industry-standard communication protocols

Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up

GCS is acting as an Employment Business in relation to this vacancy.

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Senior Hardware Development Engineer - PCB Design

Location: Sunnyvale, Caliifornia

Contract: 12+ months
Work Arrangement: 5 days onsite

About the Role

We are seeking a Senior PCB Hardware Design Engineer / Senior Hardware Development Engineer to support the development of advanced satellite payload hardware. This is a hands-on role focused heavily on board bring-up, hardware debug, design verification, validation, and supporting the transition of validated designs into subsequent hardware revisions.

The ideal candidate will have strong board-level design experience combined with extensive laboratory expertise and the ability to troubleshoot complex hardware issues from initial power-on through root-cause identification and resolution.

ResponsibilitiesLead bring-up of newly fabricated circuit boards, including power-on, section-by-section checkout, and first-time hardware debug through root cause.Plan and execute design verification and validation campaigns, including high-speed link testing, power measurements, functional testing, and detailed documentation of results.Partner closely with hardware design engineers to identify issues and drive corrective actions into subsequent board revisions.Contribute to schematic capture and PCB layout activities for next-generation hardware as project priorities and bandwidth allow.Support RF and antenna engineering teams with validated hardware and assist with their measurement and characterization requirements.Troubleshoot board-level hardware issues using systematic debug methodologies and laboratory instrumentation.Support the complete hardware development lifecycle from design and fabrication through bring-up, validation, and manufacturing support.Required Qualifications8+ years of electrical engineering experience in board-level hardware design.Strong experience with schematic capture and complex, dense multilayer PCB designs.Solid understanding of power delivery, power distribution, and sequencing.Extensive hands-on laboratory experience with board bring-up, hardware debug, and validation.Proficiency with oscilloscopes, logic/protocol analyzers, and high-speed test and measurement equipment.Experience with high-speed digital interfaces and multi-gigabit SerDes technologies such as JESD204, PCIe, 25G+ Ethernet, DDR, or similar.Strong understanding of signal integrity and power integrity considerations.Demonstrated experience across the full hardware lifecycle: design → build → bring-up → validation → manufacturing support.BSEE, MSEE, or equivalent practical engineering experience.

GCS is acting as an Employment Business in relation to this vacancy.

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Hardware Designer or PCB Designer

The Role

The team designs advanced phased-array antenna electronics for satellite communication systems, utilizing large, high-density multilayer PCBs with thousands of components, custom silicon devices, and high-speed digital interfaces operating at multi-gigabit data rates. Boards are being fabricated at a pace that exceeds the design team's validation capacity, creating an opportunity for experienced hardware engineers to own board development and laboratory validation activities.

Key Responsibilities

Lead bring-up of newly fabricated boards, including power-on testing, subsystem checkout, debugging, and root-cause analysis.Plan and execute design verification and validation activities, including high-speed digital testing, power characterization, and functional verification, while documenting results to engineering standards.Collaborate closely with design engineers to identify issues and implement improvements in future board revisions.Contribute to schematic capture and PCB layout activities for next-generation hardware designs.Support downstream integration and testing teams by delivering validated hardware and assisting with measurement and debug activities.

What We're Looking For

8+ years of board-level electrical design experience, including schematic capture, complex multilayer PCB design, power distribution, and sequencing.Strong hands-on laboratory skills with expertise in board bring-up, debugging, validation, and use of oscilloscopes, logic analyzers, protocol analyzers, and high-speed test equipment.Experience with high-speed digital interfaces and multi-gigabit serial communications (e.g., PCIe, Ethernet, DDR, JESD204) along with signal integrity and power integrity considerations.Full product lifecycle experience from design and manufacturing through bring-up, validation, and production support.Bachelor's or Master's degree in Electrical Engineering, or equivalent industry experience.

Nice to Have

Experience in satellite, aerospace, or other high-reliability electronic systems.Exposure to phased-array, RF, or radar hardware.Experience working with custom ASICs, SoCs, FPGAs, and embedded hardware platforms.Familiarity with Python-based test automation and laboratory scripting.

GCS is acting as an Employment Business in relation to this vacancy.

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